HOME
FEOL (Front End of Line: substrate process, the first half of wafer processing)
1. Isolation
Transistors are formed near the silicon wafer surface.
To ensure that each transistor operates independently, it is necessary to prevent interference with other neighboring transistors.
Therefore, the regions where transistors are to be formed are isolated. There are a number of methods for this isolation.
The technique introduced here is called STI (Shallow Trench Isolation).
INDEX
1-1. Oxide + nitride film growth
First a silicon oxide film is formed by oxidizing a silicon wafer, and then a silicon nitride film is formed using the CVD method.
1-2. Resist pattern formation
A resist pattern is formed.
1-3. Shallow trench formation
Using the resist pattern as a mask, shallow trenches are cut by etching the silicon nitride film, silicon oxide film and silicon wafer.
1-4. Buried oxide film growth
Trenches are filled by forming a thick silicon oxide film using the CVD method.
1-5. Buried oxide film polishing
The surface is polished to remove the excess silicon oxide film, and the silicon oxide film is left only in the trenches.
1-6. Nitride film removal
The silicon nitride film is removed using chemical treatment.
Process Flow
FEOL (Front End of Line: substrate process, the first half of wafer processing)
|
1. Isolation|
2. Well and channel formation|
3. Gate oxidation and gate formation|
4. LDD formation|
5. Side wall spacers |
6. Source/drain|
7. Silicide |
8. Dielectric film|
9. Contact holes|
BEOL (Back End of Line: interconnect process, the second half of wafer processing)
|
10. Metal-1|
11. Metal-2|